A Programmable Data Router By De Zeurkous Abstract: A conventional load/store machine moves, but does not operate on, data between registers and memory; a simplification termed a `register-register machine' may be employed where memory, if present, can only be accessed by instructions through special registers. An alternative is to reduce a computer to its essence: a programmable data router. 1. Introduction As noted in the related `rr' document, there are currently three basic types of computers in use: register-register, register/memory, and load/store. The first does not necessarily presume the existence of a memory, which is external to the processor. The second does presume the existence of such a memory, and is able to freely operate on data that may be in (a) register(s) and/or memory. The third architecture, load/store, acknowledges the existence of an external memory but does not provide a way to directly reference it, save two instructions explicitly designed for this purpose: load and store. The `load' instruction will load data from memory into one or more registers, while the `store' instruction will store data from one or more registers into memory. All other operations are, as a rule, performed strictly between registers. 2. Basics: a port-based architecture By simplifying a register-register architecture to its essence, influenced by by the relentless effort of some to reduce the number of instructions a computer will need to accept to usefully operate, one might arrive at the point where one is a left with an array of ports with data to route between them. For example, behind port 0 might be a register, and behind port 1 may be the input of a simple logical operation -- let us presume it is a binary NOT. Behind port 2 can then be the output of the binary NOT operation. Given these three assumptions, the following things would need to be done to invert the binary value init- ally stored in the register behind port 0 and store it back: 1) Copy the data within the register behind port 0 and the input port of the binary NOT function, port 1. The inverted value will now appear at the output port which, in our example, is port 2. 2) Copy the data from port 2 back to port 0. The original value in port 0 will now have been replaced by a value representing a binary inversion of that value. 3. A programmable data router By automating the copying of such data, and relegating the execution of meaning- ful 'instructions' to circuits behind numbered ports, and thereby removing the notion of functional instructions, one has created the ultimate simplification of the computer: a programmable data router. In such a computer, except where the practicalities of instruction fetching are concerned, memory would appear solely behind special ports as in a register-register architecture, and complex operations[1] would be performed by simply copying data between different ports behind which reside different functions of the computer. [1] Those which are not (fully) implemented in hardware. 4. Practicialities Consider the following scenario: we have a 4-bit computer that employs a single fundamental operation: perform substraction, and if the value is a numerical negative, jump (branch) to a different location in memory. We have a single array of 16 ports (enough to address within the confines of a 4-bit word). A typical cycle might be as follows: First, the processor will fetch one 4-bit word from instruction memory. It will then select a port for reading based on that value. Second, the processor will fetch another word from memory. It will then select a port (not being the same) for writing based on that value. It will then connect both ports, which, if applicable, will trigger an operation, or, in a simple case, will transfer the data from the port specified in the first word to the port specified in the second word. It will then disconnect both ports and ready to fetch and execute another instruction. In such a cycle, computation is performed as a by-product (if you will, a side effect) of data transfer; this is exactly what happens at the electrical level in a conventional processor. One might presume a similarity to a transport- triggered architecture; however, where a transport-triggered architecture is presumed to be able to conveniently execute all the functions commonly associated with computers of this time, a programmable data router as above is intended to merely act as a switch at the electrical level. However, this may not make the comparison less apt. Closing remarks: Credits to Edsger W. Dijkstra for inspiring the author. He may, however, not have liked this. The designation 'programmable data router' is heavily inspired by the trademarked designation of 'Programmable Data Processor' for several of Digital Equipment Corporation (DEC)'s early computers. The latter was invented not to evoke associations of room-sized machines that at the time were the predominant from of computers. The name 'programmable data router' is intended to evoke a similar sense of simplification. The author chastises humanity for building ever more-complex computers instead of simpler, more functional ones, for without the former, this paper would not have been necessary. [Last modified at Tue Feb 2 12:22:48 UTC 2010 by De Zeurkous.]